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Serial port general register

The specific definition of each bit is as follows: SM0 SM1SM2REN TB8 RB8 TI RISM0, SM1 are the serial port working mode setting bits, so that the two bits can correspond to the four mode settings. Serial port working mode setting. SM0 SM1 mode function baud rate 0 0 0 Synchronous shift register fosc/120 1 1 8 bit UART variable 1 0 2 9 bit UART fosc/32 or fosc/641 1 3 9 bit UART variable is only explained here The most commonly used mode 1, the other modes will be skipped one by one, friends who are interested can find the relevant hardware information to view. The fosc in the table represents the frequency of the oscillator, that is, the frequency of the crystal oscillator. UART is the English abbreviation of (Universal Asynchronous Receiver). SM2 is the multiprocessor communication enable bit in mode 2 and mode 3. In mode 0, this bit is required to be 0.REN is the receiving bit. When REN is set to 1, the serial port allows receiving, and when it is set to 0, it is forbidden to receive. REN is set or cleared by software. If the receiving and sending pins P3.0 and P3.1 are connected to the upper computer in a circuit, there is a serial port interrupt handler in the software. When it is required to process a certain subroutine, the serial port is not allowed to be controlled by the upper computer. If an interrupt is generated, you can add REN=0 at the beginning of this subroutine to prohibit receiving, and add REN=1 at the end of the subroutine to open the serial port to receive again. You can also use the actual source code above to add REN=0 to experiment.TB8 Send data bit 8. In modes 2 and 3, it is the 9th bit to be sent. This bit can be set or cleared by software as needed. Usually this bit is used as a parity bit in the communication protocol. In multiprocessor communication, this bit is used to indicate whether it is an address frame or a data frame. RB8 receives data bit 8. In modes 2 and 3, it is the 9th bit of received data. This bit may be a parity bit, address/data identification bit. In mode 0, RB8 is a reserved bit and is not used. In mode 1, when SM2=0, RB8 is the stop bit of the received data.TI Transmit interrupt flag bit. In mode 0, when the 8th bit of data is sent, it is set by hardware. In other modes, it is set by hardware at the beginning of sending the stop bit. After TI is set, apply for an interrupt, and the CPU will send the next frame of data after responding to the interrupt. In any mode, TI must be cleared by software, that is, after data is written to SBUF, the hardware sends data and interrupt response (such as interrupt is turned on). At this time, TI=1, indicating that the transmission has been completed, and TI will not It is cleared by hardware, so it must be cleared by software at this time.RI ​​Receive interrupt flag bit. In mode 0, when the 8th bit is received, it is set by hardware. In other modes, it is set by hardware in the middle of receiving the stop bit. RI=1, apply for an interrupt and require the CPU to take away the data. But in mode 1, when SM2=1, when no valid stop bit is received, RI will not be set. Similarly, RI must also be cleared by software. Commonly used serial port mode 1 is to transmit 10 bits, 1 start bit is 0, 8 data bits, low bit first, and 1 stop bit is 1. Its baud rate is variable, and its rate depends on the timer 1 or timer 2 timing value (overflow rate).

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